JEDEC STANDARD Board Level Drop Test Method of Components for Handheld Electronic Products JESDB JULY JEDEC SOLID. The reliability of this package has been studied by employing the JEDEC JESDB standard drop test. In this paper, the JEDEC B-condition is applied to. The need for RoHS compliant boards coupled with the demand for reliable electronics has resulted in the development of the JEDEC Standard JESD B to.
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A visible partial separation of component from the test board, even without a significant increase in resistance or intermittent discontinuity, shall also be considered as a failure. This test method is not meant to address the drop test methods required to simulate shipping jewd22 handling related shock of electronic subassemblies.
The jesd2, y location of the center of each component location is listed in Table 4, using the center of lower left screw hole as datum.
It should be noted that the peak acceleration and the pulse duration is a function of not only the drop height but also the strike surface. The glass transition temperature, Tg, of each dielectric material as well as of the composite board shall be oC or greater.
Smaller clearance can be used as long as it does not cause any solder mask encroachment on pads due to misregistration. In addition, a rectangular rosette strain gage shall be mounted on this set-up board underneath position U8 on the other side non-component side of the board to characterize strains in x and y directions as well as the principal strain and principal strain angle.
Suite Arlington, VA Fax: This is pictorially shown in Figure 3. The rigid fixture typically is covered with some form of material to achieve the desirable pulse and G levels.
BOARD LEVEL DROP TEST METHOD OF COMPONENTS FOR HANDHELD ELECTRONIC PRODUCTS
Due to tolerance b111 up, a small gap is still possible but this gap shall not exceed 50 microns. The overall board size shall be mm X 77 bb111 that can accommodate up to 15 components of same type in a 3 row by 5 column format. The test data generated using such a board shall be correlated at least once by generating the same data on same component using the preferred board defined in this document.
Publications Department Wilson Blvd. The drop table shall then be raised to the height specified according to JEDEC jfsd22 and dropped on the strike surface while measuring the G level, pulse duration, and pulse shape.
Test data suggests that the variations in response acceleration and strain are reduced significantly if this screw is used. JEDEC standards and publications are designed to serve the public interest through eliminating misunderstandings between manufacturers and purchasers, facilitating interchangeability and improvement of products, and assisting the purchaser in selecting and obtaining with minimum delay the proper product for use by those other than JEDEC members, whether the standard is to be used either domestically or internationally.
The modulus and Tg of the dielectric materials shall be specified. Effect of Thermal Agin This can occur if the PCB traces come bb111 the board with component while maintaining electrical continuity. Additional strain gages may also be mounted at different locations on the board to jeesd22 characterize the strain response of the assembly.
JESDB B Board level drop test menthod of components for handheld eletronic products_百度文库
The purpose of this document is to prescribe a standardized test method and reporting procedure. Because of symmetric component design and support locations, grouping see Table 6 can be used for data analysis for boards mounted with 15 components refer Figure 1.
The fundamental mode results in maximum displacements and is typically most damaging. The screw shall be tightened until the shoulder jesc22 the screw bottoms out against the standoff. It is recommended to first analyze jesx22 component reliability data at individual locations without assuming any grouping.
The number of washers used shall be the same for all four screws. Since components with body sizes larger than 15 mm x 15 mm in size are not used in these applications, the maximum size of the component body covered in this standard is 15 mm x 15 mm. The PCB assembly shall be mounted to the base plate standoffs using 4 screws, one at each corner of the board.
BOARD LEVEL DROP TEST METHOD OF COMPONENTS FOR HANDHELD ELECTRONIC PRODUCTS | JEDEC
The locations of these holes are shown in Figure 1. Although it is recommended that this characterization be performed for previously untested components, this may not be required if such characterization data is available for similar sized component. Each additional test point shall be clearly labeled using row column format of the package. Other shock conditions, such as Condition H Gs, 0. The PTH pad diameters shall be microns for the outer layer and microns for the inner layers.
One board shall also be used to measure the mechanical properties modulus, and Tg of the board at the component location using DMA and TMA method. Depending on number of components per board, Table 5 shall be used to determine the number of boards to be tested per component type. The daisy chain should either be done at the die level or by providing daisy chain links at the lead-frame or substrate level. All components used for this testing must be daisy-chained.
All components must be located within the 95 mm X 61 mm box shown by the dashed line in Figure 1 defined by the outer edges of all outer components. Other suggestions for document improvement: Since the length of shoulder is 3. This includes all traces making contact with solder joint interconnect as well as all internal layers. The primary driver of these failures is excessive flexing of circuit board due to input acceleration to the board created from dropping the handheld electronic product.
The mechanical property measurements are not required for every board lot, unless the fab process, material, or vendor is changed from lot to lot. Since a typical product board may have a combination of microvia in pad and no vias in jeds22 for area array packages for routing purposes, it is required that such components BGAs, CSPs, etc be tested on board with b111 microvia and non-microvia PCB pads.
This dropping event can not only cause mechanical jesv22 in the housing of the device but also create electrical failures in the printed circuit board PCB assemblies mounted inside jeds22 housing due to transfer of energy through PCB supports. Correlation between test and field conditions is not yet fully established. The test board shall have a nominal thickness of 1.
Organizations may obtain permission to reproduce a limited number of copies through entering into a license agreement. The maximum acceleration during the dynamic motion of b1111 test apparatus. However, this equation does not include the strike surface effect.
The event detector should be able to detect any intermittent b11 of resistance greater than ohms lasting for 1 microsecond or longer. Drop Test Simulation o Multiple drops maybe required while adjusting the drop height and strike surface to achieve the specified G levels and pulse duration Gs, 0.
These handheld electronic products are more prone to being dropped during their useful service life because of their size and weight.